Memory arrived a few days later but the Sun wasn't having any of it. POST said:
ERROR: CPU0 DIMM 0 SPD reports DIMM cycle time is less than 133 MHz.
It turns out that these machines are really picky about memory timings if you have the latest Openboot firmware. Most forum posts found with google suggest downgrading the firmware, but this isn't an option anymore since Oracle have since long pulled all firmwares from their support site.
Apparently you need CL2 memory with an SPD1.0 ROM which is practially impossible to find these days.
Hmm. Since there is the workaround of downgrading the Openboot firmware, I guessed the modules would actually be electrically compatible if you could somehow replace the SPD EEPROM. Time to fire up the scope and soldering iron!
Cue impromptu SPD dumper / flasher tool:
Fortunately Elpida was kind enough not to write-protect the EEPROM so I didn't actually need to desolder it. The EEPROM needs 3.3V but the micro is 5V. A resistor divider with a cap provides the 3.3V rail.
Now it was just a matter of dumping the first 64 bytes of the SPD of the working 512MB module:
8008070d0b0148000470750282040401 |......H..pu.....|
0e040c010226c075750000503c502d80 |.....&.uu..P<P-.|
909050500000000000414b3032756400 |..PP.....AK02ud.|
00000000000000000000000000001077 |...............w|
The new module:
8008070d0c0248000475750282040401 |......H..uu.....|
0e040c010226c0a0750000503c502d01 |.....&..u..P<P-.|
909050500000000000414b3032750000 |..PP.....AK02u..|
000000000000000000000000000000b6 |................|
And patch stuff related to timing but not to size:
8008070d0c0248000470750282040401 |......H..pu.....|
0e040c010226c075750000503c502d01 |.....&.uu..P<P-.|
909050500000000000414b3032756400 |..PP.....AK02ud.|
000000000000000000000000000010fa |................|
This adjusts byte 9 (cycle time at highest CAS latency), byte 23 (cycle time at medium CAS latency), byte 46 (reserved value?), byte 62 (SPD revision) and byte 63 (checksum).
Success! Openboot and NetBSD detect both the old and the new memory:
spdmem0 at iic0 addr 0x50
spdmem0: DDR SDRAM (registered), data ECC, 512MB, 286MHz (PC-2300)
spdmem0: 13 rows, 11 cols, 1 ranks, 4 banks/chip, 7.0ns cycle time
spdmem0: tAA-tRCD-tRP-tRAS: 1-3-3-7
spdmem0: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
spdmem1 at iic0 addr 0x51
spdmem1: DDR SDRAM (registered), data ECC, 512MB, 286MHz (PC-2300)
spdmem1: 13 rows, 11 cols, 1 ranks, 4 banks/chip, 7.0ns cycle time
spdmem1: tAA-tRCD-tRP-tRAS: 1-3-3-7
spdmem1: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
spdmem2 at iic0 addr 0x52
spdmem2: DDR SDRAM (registered), data ECC, 2GB, 286MHz (PC-2300)
spdmem2: 13 rows, 12 cols, 2 ranks, 4 banks/chip, 7.0ns cycle time
spdmem2: tAA-tRCD-tRP-tRAS: 1-3-3-7
spdmem2: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
spdmem3 at iic0 addr 0x53
spdmem3: DDR SDRAM (registered), data ECC, 2GB, 286MHz (PC-2300)
spdmem3: 13 rows, 12 cols, 2 ranks, 4 banks/chip, 7.0ns cycle time
spdmem3: tAA-tRCD-tRP-tRAS: 1-3-3-7
spdmem3: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
Curiously reports it as PC-2300 when it's supposed to be PC-2100 but oh well, it boots and seems to be stable enough for use.
